Fujitsu takes next-gen HPC flaw on the road
Fujitsu is getting prepare to tout its after that processor silicon by the side of the future searing Chips convention, a follow-up to the head peer set in the field of June.
The silicon the team devices in favor of next-generation vast iron, the SPARC64 Xlfx, is Fujitsu's possibility in favor of exascale computing: A 32-core, 1 Tflop (double precision) / 2 Tflop (single precision) monster designed to production with the Tofu2 optical interconnect.
In the field of this presentation from the come to an end of June, the vendor says the Xlfx long for be located the heart of a 3-CPU remembrance board, with 12 CPU nodes for each 2-unit fill with tears cooled hulk and 200 nodes for each cabinet. Inter-chassis links long for be located provided by Finisar optical modules, and every hulk long for include multiple Micron hybrid remembrance cubes (HMCs).
In the field of any more presentation, Fujitsu says the Xlfx-based routine long for set free 100 Petaflops for each cabinet, and long for arrange 12.5 gigabytes/second bidirectional exchange of ideas relations (which new than doubles the 5 GB/s quickness of the Tofu1 interconnect used in the field of the company's K computer).
All up, the company says, the Xlfx routine packs single K supercomputer cabinet's worth of iron grunt into every hulk, while being binary-compatible with the K and its immediate predecessor, the PRIMEHPC FX10.
The software stack has automatic parallelisation compilers in favor of Fortran, C and C++, and wires OpenMP, MPI, and XPFortran.
